GlobalSpec

Appendix 1: CMOS Process Flow

Starting material p-type substrate or p epi on p + substrate for latch-up prevention (Taur et al., 1984). Grow pad oxide. Deposit CVD (Chemical Vapor Deposition) nitride. (See Fig. A1.1.) FIGURE A1.1 ...
EDN

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...
Electronic Design

Simplified High-k/Metal-Gate Process Increases Planar CMOS Speed

IMEC, the Belgium-based nanotechnology research center, announced at this week's VLSI Symposium that it has improved the performance of its planar CMOS using hafnium-based, high-k dielectrics and ...
Design-Reuse

X-FAB Partners With Akustica to Deliver World's First CMOS MEMS Single-Chip Microphones

X-FAB to Provide Foundry Services for Akustica's Family of CMOS MEMS Silicon Microphone Chips ERFURT, GERMANY and PITTSBURGH, PA -- May 31, 2006 -- Akustica, Inc., a pioneer in acoustic system-on-chip ...
Design-Reuse

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...